MAC97A6

Planar passivated very sensitive gate four quadrant triac in a SOT54 plastic package intended to be interfaced directly to microcontrollers, logic integrated circuits and other low power gate trigger circuits.

Features and Benefits
  • Direct interfacing to logic level ICs
  • Direct interfacing to low power gate drivers and microcontrollers
  • High blocking voltage capability
  • Planar passivated for voltage ruggedness and reliability
  • Triggering in all four quadrants
  • Very sensitive gate
Applications
  • General purpose low power phase control
  • General purpose low power switching
  • Solid-state relay
Parametric
Package
Quality, reliability & chemical content
Ordering
Datasheet
Type Number Symbol Parameter Conditions Min Typ/Nom Max Unit
MAC97A6 VDRM repetitive peak off-state voltage       400 V
IT(RMS) RMS on-state current full sine wave; Tlead ≤ 50 °C     0.6 A
ITSM non-repetitive peak on-state current full sine wave; Tj(init) = 25 °C; tp = 20 ms     8 A
full sine wave; Tj(init) = 25 °C; tp = 16.7 ms     8.8 A
Tj junction temperature       125 °C
IGT gate trigger current VD = 12 V; IT = 0.1 A; T2+ G+; Tj = 25 °C   1 5 mA
VD = 12 V; IT = 0.1 A; T2+ G-; Tj = 25 °C   2 5 mA
VD = 12 V; IT = 0.1 A; T2- G-; Tj = 25 °C   2 5 mA
VD = 12 V; IT = 0.1 A; T2- G+; Tj = 25 °C   4 7 mA
IH holding current VD = 12 V; Tj = 25 °C   1 10 mA
VT on-state voltage IT = 0.85 A; Tj = 25 °C   1.4 1.9 V
dVD/dt rate of rise of off-state voltage VDM = 268 V; Tj = 110 °C; (VDM = 67% of VDRM); exponential waveform; gate open circuit 30 45   V/µs
dVcom/dt rate of change of commutating voltage VD = 400 V; Tj = 50 °C; dIcom/dt = 0.3 A/ms; IT = 0.84 A; gate open circuit   5   V/µs
Datasheet
Chemical Content

Chemical Content - MAC97A6

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