Z0107NA0
Planar passivated very sensitive gate four quadrant triac in a SOT54 (TO-92) plastic package intended for use in applications requiring enhanced noise immunity and direct interfacing to logic ICs and low power gate drivers.
Features and Benefits
- Direct interfacing to logic level ICs
- Enhanced current surge capability
- Enhanced noise immunity
- High blocking voltage capability
- Planar passivated for voltage ruggedness and reliability
- Triggering in all four quadrants
- Very sensitive gate
Applications
- General purpose low power motor control
- Home appliances
- Industrial process control
- Low power AC Fan controllers
Type Number | Symbol | Parameter | Conditions | Min | Typ/Nom | Max | Unit |
---|---|---|---|---|---|---|---|
Z0107NA0 | VDRM | repetitive peak off-state voltage | 800 | V | |||
IT(RMS) | RMS on-state current | full sine wave; Tlead ≤ 45 °C | 1 | A | |||
ITSM | non-repetitive peak on-state current | full sine wave; Tj(init) = 25 °C; tp = 20 ms | 12.5 | A | |||
full sine wave; Tj(init) = 25 °C; tp = 16.7 ms | 13.8 | A | |||||
Tj | junction temperature | 125 | °C | ||||
IGT | gate trigger current | VD = 12 V; IT = 0.1 A; T2+ G+; Tj = 25 °C | 0.3 | 5 | mA | ||
VD = 12 V; IT = 0.1 A; T2+ G-; Tj = 25 °C | 0.3 | 5 | mA | ||||
VD = 12 V; IT = 0.1 A; T2- G-; Tj = 25 °C | 0.3 | 5 | mA | ||||
VD = 12 V; IT = 0.1 A; T2- G+; Tj = 25 °C | 0.3 | 7 | mA | ||||
IH | holding current | VD = 12 V; Tj = 25 °C | 10 | mA | |||
VT | on-state voltage | IT = 1 A; Tj = 25 °C | 1.3 | 1.6 | V | ||
dVD/dt | rate of rise of off-state voltage | VDM = 536 V; Tj = 110 °C; (VDM = 67% of VDRM); exponential waveform; gate open circuit | 100 | V/µs | |||
dVcom/dt | rate of change of commutating voltage | VD = 400 V; Tj = 110 °C; dIcom/dt = 0.44 A/ms; gate open circuit | 1 | V/µs |